MEM_INTF_CFG ADDRESS 0x0040 RW
MEM_INTF_CFG RESET_VALUE 0x00
	RIF_MEM_ACCESS_EN BIT[7]

MEM_INTF_CTL ADDRESS 0x0041 RW
MEM_INTF_CTL RESET_VALUE 0x00
	BURST BIT[7]
	WR_EN BIT[6]

MEM_INTF_ADDR_LSB ADDRESS 0x0042 RW
MEM_INTF_ADDR_LSB RESET_VALUE 0x00
	MEM_INTF_ADDR_LSB BIT[7:0]

MEM_INTF_ADDR_MSB ADDRESS 0x0043 RW
MEM_INTF_ADDR_MSB RESET_VALUE 0x00
	MEM_INTF_ADDR_MSB BIT[7:0]

MEM_INTF_WR_DATA0 ADDRESS 0x0048 RW
MEM_INTF_WR_DATA0 RESET_VALUE 0x00
	MEM_INTF_WR_DATA_0 BIT[7:0]

MEM_INTF_WR_DATA1 ADDRESS 0x0049 RW
MEM_INTF_WR_DATA1 RESET_VALUE 0x00
	MEM_INTF_WR_DATA_1 BIT[7:0]

MEM_INTF_WR_DATA2 ADDRESS 0x004A RW
MEM_INTF_WR_DATA2 RESET_VALUE 0x00
	MEM_INTF_WR_DATA_2 BIT[7:0]

MEM_INTF_WR_DATA3 ADDRESS 0x004B RW
MEM_INTF_WR_DATA3 RESET_VALUE 0x00
	MEM_INTF_WR_DATA_3 BIT[7:0]

MEM_INTF_RD_DATA0 ADDRESS 0x004C R
MEM_INTF_RD_DATA0 RESET_VALUE 0xXX
	MEM_INTF_RD_DATA_0 BIT[7:0]

MEM_INTF_RD_DATA1 ADDRESS 0x004D R
MEM_INTF_RD_DATA1 RESET_VALUE 0xXX
	MEM_INTF_RD_DATA_1 BIT[7:0]

MEM_INTF_RD_DATA2 ADDRESS 0x004E R
MEM_INTF_RD_DATA2 RESET_VALUE 0xXX
	MEM_INTF_RD_DATA_2 BIT[7:0]

MEM_INTF_RD_DATA3 ADDRESS 0x004F R
MEM_INTF_RD_DATA3 RESET_VALUE 0xXX
	MEM_INTF_RD_DATA_3 BIT[7:0]

TRIG_START_ADDR_LSB_n(n):(0)-(15) ARRAY 0x00000050+0x4*n
TRIG_START_ADDR_LSB_0 ADDRESS 0x0050 RW
TRIG_START_ADDR_LSB_0 RESET_VALUE 0x00
	SEQ_ADDR_LSB BIT[7:0]

TRIG_START_ADDR_MSB_n(n):(0)-(15) ARRAY 0x00000051+0x4*n
TRIG_START_ADDR_MSB_0 ADDRESS 0x0051 RW
TRIG_START_ADDR_MSB_0 RESET_VALUE 0x00
	SEQ_ADDR_MSB BIT[7:0]