                __   _
               / /  (_)__  __ ____ __
              / /__/ / _ \/ // /\ \ /
             /____/_/_//_/\_,_//_\_\
                   / _ \/ _ \
   __   _ __      _\___/_//_/ __             _
  / /  (_) /____ | |/_/__| | / /____ __ ____(_)__ _____  __
 / /__/ / __/ -_)>  </___/ |/ / -_) \ // __/ (_-</ __/ |/ /
/____/_/\__/\__/_/|_|    |___/\__/_\_\/_/ /_/___/\__/|___/

 32-bit VexRiscv CPU with MMU integrated in a LiteX SoC

